MX960
From Juniper Clue
| | |
| FPC/PIC Slots | 12 DPC |
| Agg. Bandwidth | 480 Gbit/s |
| FPC Types | DPC |
| PIC Style | DPC-Style |
| Power Supplies | 4 (2+2 DC, 3+1 AC) |
| Switch Board | SCB (2+1 for line rate) |
| Release date | February 2007 with JUNOS 8.2 |
The MX960 (Codename: Harry) marked Juniper's entrance into the ethernet based "switch" market. The MX960 was launched as Harry, a full Layer 3 platform (MX-R), and later followed up with Triton, a software-locked VPLS-centric box using the same hardware (MX-X). The entire MX-series platform is known as codename 'Atlas'. Technically the Juniper MX960 architecture does not resemble a traditional ethernet "switch" at all, but is instead implemented using the Juniper I-Chip 3.0 and other existing T-series hardware which has already been developed. Software changes allow the MX960 to function as a "switch", and perform integrated bridging and routing functions.
The MX960 has 14 vertical front-end slots, two (2) of which are reserved for switch control boards (with onboard RE-1300 or RE-2000 routing engines), and twelve (12) of which are available for physical interfaces or an additional SCB (for line-rate redundancy; only two routing engines are supported). The MX series eliminates the concept of FPC+PIC, and uses new full-height cards which combine FPC+PIC functionality (including Tunnel PIC), known as DPCs (Dense Port Concentrators). At initial launch, the only two DPCs are a 4-port 10GE XFP-based card (LAN/WAN PHY), and a 40-port 1GE SFP-based card. A 40-port 10/100/1000 DPC is expected shortly thereafter, to be followed by a 2-port 10GE XFP+20-port 1GE-SFP Combo card.
First Generation
The MX960 became Juniper's first ethernet-centric "services switch" product, and marked the introduction of the DPC interface card. Interface cards are built around Juniper's proprietary full-duplex 10gbps NPU I-Chip, which integrates the functionality of the Internet Processor II and several other chips on one die (including Tunnel PIC functionality). Individual 10GE interfaces can be configured to provide tunnel services (the physical interface is not available for use). On the 40xGigE DPC, a 1gbps "11th PIC" on each of the four I-Chips can be used for this purpose without impacting the 10 physical interfaces controlled by the chip. Initially, I-chip was developed for edge functionality similar to Juniper M-series, so Juniper added EZChip NP-2 NPU for Ethernet-specific L2 functionality and (optional) rich queuing to MX linecards. This tandem of two highly integrated chips ensured speed and feature growth potential, with density sufficient to provide full-duplex 40G forwarding on one DPC card with four I-chip/EZ complexes. This design quickly gained market from service providers, who were pleased with rich IP/MPLS feature set and clear Ethernet focus of the device.
Second Generation (MX3D)
The second generation of MX hardware was introduced by Juniper in 4Q2009 and is built around a brand-new "Trio" chipset. There are no 3rd party NPUs in the design. The new 30Gbps (full-duplex) NPU is the company's first chip oriented towards the "common edge" and integrating rich L2/L3 and broadband subscriber management functionality. The new network cards (MPC) employ a constellation of four "Trio" chips for full-duplex throughput of 120 Gbps per slot (with support for up to 16x10GE ports with 4:3 oversubscription ratio).
Competition
At launch, MX-series mainly competed with Cisco 7600. Following the demise of Cisco 7600, competitive focus of MX-series shifted towards Alcatel 7750.
Second generation of MX-series (MX3D) is positioned against A7750 equipped with IOM3 hardware (50Gbps full-duplex per slot). With IOM3, A7750SR12 can deliver up to 500Gbps (full-duplex) capacity in ten slots and one-third of a rack. This compares to MX3D 960 1.44Tbps full-duplex capacity in 1/2 rack.
New for 2009 was competition from Cisco ASR9010 (eight linecard slots). When equipped with 8-port 10GE cards, ASR9010 can offer up to 640Gbps of full-duplex throughput in half-rack package. Current generation of Cisco ASR9K is built around EZChip NP-3c processor (15Gbps full-duplex).

