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Juniper MX960 ESR
MX960 Front.jpg
FPC/PIC Slots 12 DPC
Agg. Bandwidth 480 Gbit/s
PIC Style DPC-Style
Power Supplies 4 (2+2 DC, 3+1 AC)
Switch Board SCB (2+1 for line rate)
Release date February 2007 with JUNOS 8.2

The MX960 (Codename: Harry) marked Juniper's entrance into the ethernet based "switch" market. The MX960 was launched as Harry, a full Layer 3 platform (MX-R), and later followed up with Triton, a software-locked VPLS-centric box using the same hardware (MX-X). The entire MX-series platform is known as codename 'Atlas'. Technically the Juniper MX960 architecture does not resemble a traditional ethernet "switch" at all, but is instead implemented using the Juniper I-Chip 3.0 and other existing T-series hardware which has already been developed. Software changes allow the MX960 to function as a "switch", and perform integrated bridging and routing functions.

The MX960 has 14 vertical front-end slots, two (2) of which are reserved for switch control boards (with onboard RE-1300 or RE-2000 routing engines), and twelve (12) of which are available for physical interfaces or an additional SCB (for line-rate redundancy; only two routing engines are supported). The MX series eliminates the concept of FPC+PIC, and uses new full-height cards which combine FPC+PIC functionality (including Tunnel PIC), known as DPCs (Dense Port Concentrators). At initial launch, the only two DPCs are a 4-port 10GE XFP-based card (LAN/WAN PHY), and a 40-port 1GE SFP-based card. A 40-port 10/100/1000 DPC is expected shortly thereafter, to be followed by a 2-port 10GE XFP+20-port 1GE-SFP Combo card.

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