J-cell

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J-Cells and Bandwidth

On Martini architecture routers, per-FPC bandwidth limitation comes from the B-Chip to A1-Chip link, which has a raw bandwidth of 4 Gigabits/sec in each direction. Each J-Cell has an overhead of 16 bytes per 64 bytes of payload, leaving only 3.2 Gigabits/sec for J-Cell payload. Thus each FPC can switch at most in each direction:

\left(\frac{\mbox{4 Gigabits/second}}{\frac{\left((\mbox{64 bytes} \times \frac{\mbox{8 bits}}{\mbox{1 byte}})+(\mbox{16 bytes} \times \frac{\mbox{8 bits}}{\mbox{1 byte}})\right)}{\mbox{J-cell}}}\right) = \mbox{6.25 Megacells/sec}

It is a common misconception that the limit comes from the SDRAM speed on the FPC, which is also 4 Gigabits/sec (64-bit data path at 125MHz). However, the packets sprayed across the FPCs SDRAM buffer memory are addresses by the B-Chip as 64-byte words, and do not have any J-Cell overhead.

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